Prof. William Fornaciari




COdesign and power Management in PLatform-based design space EXploration

The primary objective of COMPLEX is to develop an innovative, highly efficient and productive design methodology and a holistic framework for iteratively exploring the design space of embedded hardware/software (HW/SW) systems.

Rising heterogeneity and complexity of embedded systems results into gaps and defines challenges a leading industry has to face

  • handling complexity of execution platforms and applications
  • uncertainty of platform selection and application to platform mapping
  • balancing between increasing power consumption, possible performance, and explicit application needs
  • meeting memory demands both in size and access times

Evolving Key Technologies and the Resulting Gaps to be closed

  • rising complexity of applications and execution platforms. Gap between these complexities boosts the uncertainty of platform selection and application to platform mapping, and requires EDA tools and methods that are fast enough to cope with the size and complexity of recent algorithms.
  • power consumption is a main limiting factor, a balance between performance and power needs to be found early in the design process. This can only be performed under explicit consideration of the application. To ensure a sufficient power control, tools and methods have to be not only fast enough, but also accurate in prediction and efficient in optimization.
  • memory access times is another important limiting factor which requires smarter memory organization. Since this influences both power and performance a multi-objective design space exploration is required.

The COMPLEX Framework Approach

  • Highly efficient and productive design methodology and a holistic framework for iteratively exploring embedded HW/SW applications.
  • Augmentation of well established ESL tools enabling performance & power aware virtual prototyping from a combined HW/SW perspective.
  • Multi-objective co-exploration in combination with fast simulation and assessment at the earliest instant in the design cycle.

Main stages

  1. MDA design entry: MARTE UML Profile, Stateflow and Simulink support
  2. Executable specification: Executable system specification in SystemC, input stimuli derived by MARTE use-case specification, IP-XACT platform specification for IP component view
  3. Estimation & model generation: HS/SW task separation & testbench generation, automatic source analysis - behavioral synthesis and cross compilation, RTL IP component model integration, virtual platform generator with TLM2 interface synthesis
  4. Overall system simulation: Enables high-speed simulation including OSCI TLM2 with Metadata (area, power, delay) annotations, down to bus cycle accurate simulation, includes self-simulating timing and power models
  5. Exploration & Optimisation: Simulation trace analysis, connection to automatic exploration, visualization and reporting, hints for optimisations during application and platform refinement

POLIMI Role : Run-Time Management of resources tailored for wireless sensor networks, energy estimation of software (C language) at source level (SWAT tool), Automatic design space exploration (MOST tool)