Su ACA-COMO-SCHEDULE ACA-COMO-EXAMS

 

Politecnico di Milano - Polo di Como

A. A. 2016-2017 Second Semester

Advanced Computer Architectures - 088949
(for the Master of Science Program in Engineering of Computing Systems - ORD. 270)

Prof. Cristina Silvano - cristina.silvano@polimi.it

Teaching Assistant: Ing. Ahmet Erdem - ahmet.erdem@polimi.it

COURSE INFO:

Course completely offered in English

Schedule: Second Semester 2016-2017 (SPRING 2017)
Tuesday  10.15 - 13.15 Location: VS8B via Valleggio 11, COMO
Thursday  13.15 - 15.15 Location: VS8B via Valleggio 11, COMO 

Office hours for students: Tuesday 14.15 - 16.15 at Polo di Como, VIA ANZANI 42, 2nd floor (please send an email to get an appointment). 

Main Contact: The students can contact prof. Cristina Silvano by  e-mail (cristina.silvano@polimi.it) by indicating:
Subject: ACA COURSE, Name, Surname, POLIMI_ID_NUMBER
 

Objective of the course: The course deals with advanced computer architectures, focusing on aspects of interest for embedded systems and multicore. Topics include, but are not limited to, processor architectures, memory architectures, Instruction-Level Parallelism in CPUs (with particular reference to superscalar architectures), multicore and multiprocessor architectures, interaction between hardware organization and software.

COURSE PROGRAMME

Main lectures topics:

  1. Review of basic computer architecture: the RISC approach and pipelining, the memory hierarchy
  2. Basic performance evaluation metrics of computer architectures
  3. Techniques for performance optimization: processor and memory
  4. Instruction level parallelism: static and dynamic scheduling;  superscalar architectures: principles and problems; VLIW (Very Long Instruction Word) architectures, examples of architecture families
  5. Thread-level parallelism: architetctures 
  6. Multiprocessors and multicore systems: taxonomy, topologies, communication management, memory management, cache coherency protocols, example of architectures
  7. Stream processors and vector processors; Graphic Processors, GPGPU

Teaching Activity: The course consists of 5 CFU and it is organized in 30 hours of lectures and 20 hours of written/tool-based  exercises to prove the concepts presented during the lectures. 

Pre-requirements: Basic concepts on logic design and computer architectures.

FINAL EXAM:
The final examination consists of a WRITTEN EXAM and an OPTIONAL part consisting of  an oral presentation OR discussion of a project topic prepared during the course (the topic for presentation and project will be assigned by the professor and it will cover specific techniques and methodologies) that will be presented by the student at the end of the course. For each written exam, a max. score of 33 points will be assigned: 15 max. points will be assigned for the solution of the exercise part and 18 points will be assigned for answering to the theory part. The OPTIONAL part can provide EXTRA points (from 1 to 2 extra points for the oral presentation and 1 to 4 extra points for the project). The additional points given by the project will be added to the score of the written exam only if the final score of the written exam will be sufficient (>=18).

The project will be assigned at the midterm of the course semester and it must be concluded and presented by June, 2017 (firm deadline).

Teaching materials: 

  • Notes of the lectures and slides provided on this web page. If you're using MOZILLA FIREFOX AS WEB BROWSER, for a correct visualisation and printing of the PDF SLIDES, please use the SAVE AS option and save the PDF FILE on your laptop for correct visualisation and printing.

  • Reference Book: "Computer Architecture, A Quantitative Approach", John Hennessy, David Patterson, Morgan Kaufmann, Fifth Edition.

  • Additional Book: "Computer Organization & Design: The Hardware/Software Interface",  D. A. Patterson and J. L. Hennessy, Morgan Kaufmann Publishers, Fifth Edition.

LINK TO ACA COURSE SCHEDULE

LINK TO EXAM TEXTS and RESULTS