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ACA MILANO COURSE SCHEDULE AA 2016-2017
(TEACHING MATERIAL TO BE UPDATED ON-GOING)

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LESSON DATE TOPIC AND SLIDES
INTRO MON. 6 MARCH 2017 

INTRODUCTION TO THE AAC COURSE
(6MB file to be downloaded!)

Lesson 1 MON. 6 MARCH 2017  Lesson 1: Pipelining: Basic Concepts
      Architectecture of the MIPS Pipeline processor
Lesson 1 WED. 8 MARCH 2017

CONTINUATION OF LESSON 1:
      Pipelining

Lesson 2A MON. 13 MARCH 2017 Lesson 2: Branch Prediction Techniques
      The problem of control hazards
      Static branch prediction techniques
Lesson 2B WED. 15 MARCH 2017       Dynamic branch prediction techniques
Lesson 3 MON. 20 MARCH 2017 LESSON 3:
      Instruction Level Parallelism - Part I
      Intro to ILP; Dependences and Hazards;
      Dynamic Scheduling vs. Static Scheduling;
      Superscalar vs VLIW Processors;
EXE 1 WED. 22 MARCH 2017

EXERCISES oN Pipelining Optimization:

FIRST EXERCISE ON PIPELINING
FIRST ASSIGNMENT on PIPELINING - EX1A

EXE 2 MON. 27 MARCH 2017
more EXERCISES oN Pipelining Optimization    
       
(iNCLUDING the solutions of the first assignment)
EXE 3 Wed. 29 MARCH 2017 Lesson on Introduction to Performance Evaluation
EXERCISES on Performance evaluation
Lesson 4 MON. 3 APRIL 2017 LESSON 4:
      Instruction Level Parallelism - Part II
      Dynamic Scheduling: Scoreboard Technique
Lesson 5 WED. 5 APRIL 2017 LESSON 5:
      Instruction Level Parallelism - Part III
      Dynamic Scheduling: Tomasulo Algorithm

EXE 4
 
MON. 10 APRIL 2017 EXERCISES oN dynamic scheduling techniques: scoreboard
EXE 5 WED. 12 APRIL 2017 EXERCISES ON DYNAMIC SCHEDULING TECHNIQUES: TOMASULO
Lesson 6 WED. 19 APRIL 2017 LESSON 6:
      Instruction Level Parallelism - Part IV
      Register Renaming
Lesson 7 WED. 19 APRIL 2017

LESSON 7: Instruction Level Parallelism - Part V
      Reorder Buffer and Speculation

Lesson 8A MON. 8 MAY 2017

LESSON 8A:
      Memory Hierarchy: Basic Concepts - Part I
 

EXE 4 WED. 10 MAY 2017 EXERCISE on OUT-OF-ORDER MULTISTAGE PIPELINE NEW VERSION! 

EXERCISE ON MULTIPLE ISSUE  

Lesson 8B MON. 15 MAY 2017 LESSON 8B:
      Memory Hierarchy: Advanced Concepts - Part II
     
      Virtual Memory
Lesson 9A WED. 17 MAY 2017 LESSON 9A:
      Instruction Level Parallelism - Part VI
      Static Multiple-issue Processors: VLIW (Very Long Instruction Word)  Architectures

     THIRD EXE PIPELING (including VLIW)

Lesson 9B WED. 22 MAY 2017 LESSON 9B:
      Instruction Level Parallelism - Part VII
     VLIW Code Scheduling
Lesson 10A   LESSON 10A:
      Beyond ILP: Multithreading - Part I
Lesson 10B   LESSON 10B:
      Beyond ILP: Multithreading - Part II
Lesson 11A   LESSON 11A:
      Introduction to Multiprocessors_PartI new!
Lesson 11B   LESSON 11B:
      Introduction to Multiprocessors PartII new!
EXE 6   EXERCISES on PERFORMANCE OF MEMORY HIERARCHY
EXE 6   EXERCISES on Branch Predictor
Lesson 13A   LESSON 13A:
SIMD_Vector_Processors new!
Lesson 13B   LESSON 13B:
INTRO TO GP-GPUs
   

END OF COURSE

  INFO ABOUT THE OPTIONAL PROJETCS

ASSIGNMENT OF PROJECTS MUST BE COMPLETED BEFORE EACH WRITTEN EXAM SESSION - FIRM DEADLINE (The project is OPTIONAL) -- MAX TWO PERSONS FOR EACH PROJECT.

THE PROJECT SLIDES MUST BE SENT TO PROF. SILVANO THE DAY BEFORE EACH WRITTEN EXAM SESSION at 6pm (ADDING IN CC THE TUTOR OF THE PROJECT). EMAIL SUBJECT: AAC COURSE PROJECT -- SURNAME NAME.

bullet PROJECT DESCRIPTION AND RESULTS Presentation IN ENGLISH (SINGLE PERSON): Min 10 Max 12 slides in English (FORMAT: .PPT or .PDF)
bullet PROJECT DESCRIPTION AND RESULTS Presentation IN ENGLISH (TWO PERSONS): Min 15 Max 20 slides in English (FORMAT: .PPT or .PDF)

A CALENDAR OF PROJECT PRESENTATIONS WILL BE POSTED HERE (ONLY PROJECT SENT THE DAY BEFORE EACH  WRITTEN EXAM SESSION at 6PM WILL BE INCLUDED). ANY PROJECT SENT AFTER THE DEADLINE WILL NOT ASSIGN ANY SCORE TO STUDENTS. DURING THE PROJECT PRESENTATIONS THE STUDENTS SHOULD ALSO INCLUDE A 5 MIN. DEMO