Su

 

 

International Books and Book Chapters

Near Threshold Computing. Technology, Methods and Applications, Editors: Michael Huebner, Cristina Silvano.
Springer, 1st Edition., 2016, IX, 100 p. 56 illus., Hardcover ISBN: 978-3-319-23388-8.
Pre-print Front Matter
PDF

 This book explores near-threshold computing (NTC), a design-space using techniques to run digital chips (processors) near the lowest possible voltage. Readers will be enabled with specific techniques to design chips that are extremely robust; tolerating variability and resilient against errors. Variability-aware voltage and frequency allocation schemes will be presented that will provide performance guarantees, when moving toward near-threshold manycore chips. 

  • Provides an introduction to near-threshold computing, enabling reader with a variety of tools to face the challenges of the power/utilization wall;

  • Demonstrates how to design efficient voltage regulation, so that each region of the chip can operate at the most efficient voltage and frequency point;

  • Investigates how performance guarantees can be ensured when moving towards NTC manycores through variability-aware voltage and frequency allocation schemes.

Low Power Networks-on-Chip Editors: Cristina Silvano Marcello Lajolo Gianluca Palermo
Springer, 1st Edition., 2011, X, 300 p. 100 illus., Hardcover ISBN: 978-1-4419-6910-1

In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities, since power and energy issues still represent one of the limiting factors in integrating multi- and many-cores on a single chip. This book covers power and energy aware design techniques from several perspectives and abstraction levels and offers a single-source reference to some of the most important design techniques proposed in the context of low-power design for networks-on-chip architectures.

  • Describes the most important design techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in networks-on-chip based architectures;

  • Applies state-of-the-art, low-power design techniques to the design of Networks-on-Chip, to demonstrate methodology for design of high-speed, low-power interconnect;

  • Offers a single source reference to the latest research, otherwise available only in disparate journals and conference proceedings.

"Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach", Editors: Cristina Silvano; William Fornaciari; Eugenio Villar
Springer, 1st Edition, 2011, XVIII, 222, p. 88 illus. Hardcover, ISBN 978-1-4419-8836-2.
Pre-print Front Matter
PDF

This book serves as a reference for researchers and designers in Embedded Systems who need to explore design alternatives.  The MULTICUBE project (an EU Seventh Framework Programme project) has focused on this problem for the past three years and is the basis for this book.  It provides a design space exploration methodology for the analysis of system characteristics and the selection of the most appropriate architectural solution to satisfy requirements in terms of performance, power consumption, number of required resources, etc.  This book focuses on the design of complex applications, where the choice of the optimal design alternative in terms of application/architecture pair is too complex to be pursued through a full search comparison, especially because of the multi-objective nature of the designer’s goal, the simulation time required and the number of parameters of the multi-core architecture to be optimized concurrently. 

  • Describes the MULTICUBE Design Space Exploration methodology, which provides a multi-level system specification and modeling framework to provide static and dynamic evaluation of the system-level metrics;

  • Provides a common tool interface composed of several layers that are connected through standardized interfaces;

  • Offers a short path to real design space exploration, through use of industrial design flows for examples and tools;

  • Includes optimizations in areas such as multi-processor architectures, multimedia, power consumption, design time, system-level simulation and profiling, run-time management of resources, etc.

 

"Power Estimation and Optimization Methodologies for VLIW-Based Embedded Systems", Authors: Vittorio Zaccaria, Mariagiovanna Sami, Donatella Sciuto, Cristina Silvano
Kluwer Academic Publishers, Boston, 2003, XXIV, Hardbound, ISBN 1-4020-7377-1, February 2003, 201 pp.
Pre-print Book Proof
PDF

LOW power design is playing an important role in today ultra-large scale integration (ULSI) design, particularly as we continue to double the number of transistors on a die every two years and increase the frequency of operation at fairly the same rate. Certainly, an important aspect of low power faces with mobile communications and it has a huge impact on our lives, as we are at the start-line of the proliferation of mobile PDA’s (Personal Digital Assistants), Wireless LAN and portable multi-media computing. All of these devices are shaping the way we will be interacting with our family, peers and workplace, thus requiring also a new and innovative low power design paradigm. Furthermore, low power design techniques are becoming paramount in high performance desktop, base-station and server applications, such as high-speed microprocessors, where excess in power dissipation can lead to a number of cooling, reliability and signal integrity concerns severely burdening the total industrial cost. Hence, low power design can be easily anticipated to further come into prominence as we move to next generation System-on-Chip and Network-on-Chip designs. This book is entirely devoted to disseminate the results of a long term research program between Politecnico di Milano (Italy) and STMic- electronics, in the field of architectural exploration and optimization techniques to designing low power embedded systems.

Academic Textbook (in Italian)

  1. F. Fummi, M. Sami, C. Silvano, "Progettazione digitale" (in Italian) - Second Edition, McGraw-Hill, Jan 2007, ISBN::  88-386-6352-1, 390pp. url

  2. F. Fummi, M. Sami, C. Silvano, "Progettazione digitale", (in Italian), McGraw-Hill, Feb. 2002, ISBN 88-386-6027-1.

Book Chapters

1.  Ioannis Stamelakos, Sotirios Xydis, Gianluca Palermo, Cristina Silvano, "Variability-Aware Voltage Island Management for Near-Threshold Computing with Performance Guarantees", pp. 35-53, Near Threshold Computing. Technology, Methods and Applications, Editors: Michael Huebner, Cristina Silvano. Springer, 1st Edition., 2016, IX, 100 p. 56 illus., Hardcover ISBN: 978-3-319-23388-8. Pre-print Chapter Proof PDF

2.  C. Silvano, W. Fornaciari, G. Palermo, V. Zaccaria, F. Castro, M. Martinez, S. Bocchio, R. Zafalon, P. Avasare, G. Vanmeerbeeck, C. Ykman-Couvreur, M. Wouters, C. Kavka, L. Onesti, A. Turco, U. Bondi, G. Mariani, H. Posadas, E. Villar, C. Wu, F. Dongrui, Z. Hao and T. Shibin, "MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures", pp. 47-63, in "VLSI 2010 Annual Symposium", Selected Papers, Nikolaos Voros, Amar Mukherjee, Nicolas Sklavos, Konstantinos Masselos, Michael Huebner (Editors), Lecture Notes in Electrical Engineering, Volume 105, 1st Edition., 2011, VIII, 331 p., Springer Netherlands, ISBN 978-94-007-1487-8, Due: August 31, 2011, DOI: 10.1007/978-94-007-1488-5_19

3.  C. Silvano, W. Fornaciari, S. Crespi Reghizzi, G. Agosta, G. Palermo, V. Zaccaria, P. Bellasi, F. Castro, S. Corbetta, A. Di Biagio, E. Speziale, M. Tartara, D. Melpignano, J.-M. Zins, D. Siorpaes, H. Hübert, B. Stabernack, J. Brandenburg, M. Palkovic, P. Raghavan, C. Ykman-Couvreur, A. Bartzas, S. Xydis, D. Soudris, T. Kempf, G. Ascheid, R. Leupers, H. Meyr, J. Ansari, P. Mähönen and B. Vanthournout, "2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-Core Architectures", pp. 65-79, in "VLSI 2010 Annual Symposium", Selected Papers, Nikolaos Voros, Amar Mukherjee, Nicolas Sklavos, Konstantinos Masselos, Michael Huebner (Editors), Lecture Notes in Electrical Engineering, Volume 105, 1st Edition., 2011, VIII, 331 p., Springer Netherlands, ISBN 978-94-007-1487-8, Due: August 31, 2011, DOI: 10.1007/978-94-007-1488-5_19

4.  C. Silvano, W. Fornaciari, G. Palermo, V. Zaccaria, F. Castro, M. Martinez, S. Bocchio, R. Zafalon, P. Avasare, G. Vanmeerbeeck, C. Ykman-Couvreur, M. Wouters, C. Kavka, L. Onesti, A. Turco, U. Bondi, G. Mariani, H. Posadas, E. Villar, C. Wu, F. Dongrui, Z. Hao, "The MULTICUBE Design Flow", pp. 3-17, in  "Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach", Cristina Silvano; William Fornaciari; Eugenio Villar; (Editors); Springer, 1st Edition., 2011, XVIII, 222 p., 88 illus. Hardcover, ISBN 978-1-4419-8836-2, Due: August 29, 2011, DOI: 10.1007/978-1-4419-8837-9. Pre-print Chapter1 Proof PDF

5.  E. Rigoni, C. Kavka, A. Turco, G. Palermo, C. Silvano, V. Zaccaria, G. Mariani, "Optimization Algorithms for Design Space Exploration of Embedded Systems", pp. 51-74, in  "Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach", Cristina Silvano; William Fornaciari; Eugenio Villar; (Editors); Springer, 1st Edition., 2011, XVIII, 222 p., 88 illus. Hardcover, ISBN 978-1-4419-8836-2, Due: August 29, 2011, DOI: 10.1007/978-1-4419-8837-9. Pre-print Chapter3 Proof   PDF

6.  G. Palermo, C. Silvano, V. Zaccaria, E. Rigoni, C. Kavka, A. Turco and G. Mariani, "Response Surface Modeling for Design Space Exploration of Embedded Systems", pp. 75-92, in  "Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach", Cristina Silvano; William Fornaciari; Eugenio Villar; (Editors); Springer, 1st Edition., 2011, XVIII, 222 p., 88 illus. Hardcover, ISBN 978-1-4419-8836-2, Due: August 29, 2011, DOI: 10.1007/978-1-4419-8837-9. Pre-print Chapter4 Proof PDF

7.  P. Avasare, C. Ykman-Couvreur, G. Vanmeerbeeck, G. Mariani, G. Palermo, C. Silvano and V. Zaccaria, "Design Space Exploration Supporting Run-Time Resource Management", pp. 93-107, in  "Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach", Cristina Silvano; William Fornaciari; Eugenio Villar; (Editors); Springer, 1st Edition., 2011, XVIII, 222 p., 88 illus. Hardcover, ISBN 978-1-4419-8836-2, Due: August 29, 2011, DOI: 10.1007/978-1-4419-8837-9. Pre-print Chapter5 Proof PDF

8.  C. Kavka, L. Onesti, E. Rigoni, A. Turco, S. Bocchio, F. Castro, G. Palermo, C. Silvano, V. Zaccaria, G. Mariani, F. Dongrui, Z. Hao, and T. Shibin, "Design Space Exploration of Parallel Architectures", pp. 171-188, in  "Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach", Cristina Silvano; William Fornaciari; Eugenio Villar; (Editors); Springer, 1st Edition., 2011, XVIII, 222 p., 88 illus. Hardcover, ISBN 978-1-4419-8836-2, Due: August 29, 2011, DOI: 10.1007/978-1-4419-8837-9. Pre-print Chapter8 Proof PDF

9.  G. Mariani, C. Ykman-Couvreur, P. Avasare, G. Vanmeerbeeck, G. Palermo, C. Silvano and V. Zaccaria, "Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming", pp. 189-204, in  "Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach", Cristina Silvano; William Fornaciari; Eugenio Villar; (Editors); Springer, 1st Edition., 2011, XVIII, 222 p., 88 illus. Hardcover, ISBN 978-1-4419-8836-2, Due: August 29, 2011, DOI: 10.1007/978-1-4419-8837-9. Pre-print Chapter9 Proof PDF

10.  L. Fiorin, G. Palermo, C. Silvano and M. Sami, "Security in Networks-on-Chips", pp. 123-154; in "Networks-on-Chips: Theory and Practice". Fayez Gebali, Haytham Elmiligi, and M.Watheq El-Kharashi (Eds.), Taylor & Francis Group LLC - CRC Press, US, 2009, ISBN: 978-1-4200-7978-4 (Hardcover),

11.  G. Beltrame, D. Sciuto, and C. Silvano, "A Power-Efficient Methodology for Mapping Applications on Multi-Processor System-On-Chip Architectures", pp. 177-196, VLSI-SoC: Research Trends in VLSI and Systems on Chip, Fourteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2006), October 16-18, 2006, Nice, France, Series: IFIP International Federation for Information Processing , Vol. 249, Giovanni De Micheli; Salvador Mir; Ricardo Reis, (Eds.), Springer, 2008, 398 p., Hardcover ISBN: 978-0-387-74908-2, ISSN: 1571-5736, DOI: 10.1007/978-0-387-74909-9_11

12.  L. Benini, G. De Micheli, E. Macii, D. Sciuto, and C. Silvano, "Address Bus Encoding Techniques for System-Level Power Optimization", pp. 275-289; in Design, Automation, and Test in Europe - The Most Influential Papers of 10 Years DATE, Rudy Lauwereins; Jan Madsen (Eds.); 2008, 516 p., ISBN: 978-1-4020-6487-6, Springer Ed, DOI: .10.1007/978-1-4020-6488-3_6

13.  D. Barretta, L. Breveglieri, P. Maistri, M. Monchiero, L. Negri, A. Pagni,  G. Palermo, M. Sami, C. Silvano, O. Villa, R. Zafalon, "Low Power Architectures for Mobile Systems", pp 177-206, in "Mobile Information Systems - Infrastructure and Design for Adaptivity and Flexibility". Barbara Pernici Editor, Springer, 2006, XVI, 354p., 137 illus., ISBN 978-3-540-31008-2

14. W. Fornaciari , P. Gubian, D. Sciuto, C. Silvano, “Power Estimation of Embedded Systems: a Hardware/Software Co-design Approach”, pp. 249-258, in “Readings in Hardware/Software Co-design”, Edited by G. De Micheli, R. Ernst, e W. Wolf, The Morgan Kaufmann Series in Systems on Silicon, Kluwer Academic Publishers, Norwell, MA, USA.